1.1.1(a) Flashcards

- it's a core computational part of the CPU - it's a digital circuit - it's performs bitwise operations, so it shifts binary patterns to the left/right - it performs all arithmetic and logical operations

- it operates under control signals, by the control unit - it gets the operands (data) from the registers, then it performs the operation, then the results gets stored in the ACC/memory

- so that the processor can perform arithmetic calculations and decision making

- it's a main component of the CPU - it's hardwired -> fast and inflexible(doesn't change) - it's microprogrammed -> easy and slower to update - it directs operations of the CPU -> so it tells each component what to do and when

- it sends control signals -> via the control bus -> to coordinate hardware components - it also decodes instruction in memory (CIR)

- to synchronize and control the flow of data -> so that instructions are executed in the correct time and order - so that the processor can keep control of logical flow and coordinate tasks

-it's a small, fast memory location in the CPU that temporarily stores data + instructions

- a small, fast memory location - in the CPU - temporarily stores data and instructions

- stores status flags - e.g. zero carry negative overflow - which is used by the ALU to signal results - so it's often a part of the ALU subsystem

- stores the address of the next instruction - to fetch - so it links to control flow (branching)

- stores the result of calculations - form the ALU - so it decreases access to RAM - for every result

- stores the address of the data/instruction - to fetch/ write to - so it works with the address bus

- temporarily stores the data/instruction - that's being fetched from/written to memory - so the data travels via the data bus

- holds the current instruction - that's being decoded/executed - so it directly links to the instruction decoding in the CU

- it's a shared communication system - that transfers data/address/control signals

- data bus - address bus - control bus

- direction -> bi-directional -> e.g. ACC <-> MAR <-> memory - purpose -> carries actual data + instruction between the CPU, memory and I/O device

- direction ->uni-directional -> so only from CPU to memory - e.g. PC-> MAR->address bus - purpose -> carries the address of the memory location to be read written

- direction -> bi-directional - e.g. CU to other components - purpose -> carries control signals which manages flow of data (so it transfers read/write/clock/interrupts)

- I/O read -I/O write - memory read/write - clock signals - interrupts (temporarily stops the execution to handle important tasks)